The present invention relates to a method and apparatus for testing electronic circuitry and, more particularly, to a method and apparatus for testing electronic devices (such as integrated circuit chips) at depressed temperature.
There is a need to test electronic circuitry, such as integrated circuit chips, at very depressed temperatures to determine the suitability of such circuitry for use in equipment, e.g., satellites, used in space, or to identify the cause of failure of circuitry when used at low temperature. The low temperature testing requires removing the top of (delidding) the plastic housing encapsulating the actual integrated circuit chip to expose contact points therein, and then lowering the temperature. When the temperature is lowered under atmospheric conditions, condensation or frost can develop and accrete on the exposed surface of the integrated circuit chip, making meaningful testing of the circuit impossible because the characteristics of the various circuit paths are altered.
It was common heretofore in the low temperature testing of electronic circuitry to avoid the condensation and frost problem by placing substantially the entire test station used to hold and make contacts with circuit paths in the chip, in an environmental enclosure or dry box. The interior of the enclosure is purged by supplying it with a gas such as dry nitrogen to displace air carrying water vapor so that when the temperature of the circuitry is reduced by virtue of its heat exchange relationship with a hot/cold stage, there can be no condensation or frosting. While satisfactory, the use of such an enclosure is somewhat cumbersome and slow in that various objects, e.g., the probe tips for contacting the desired circuit paths in the chip, must be situated and moved using gloves having skirts which seal openings in a wall of the enclosure. The enclosure also takes up significant valuable laboratory counter space.
In other prior art low temperature testing apparatus, a microelectric chip is precisely held on a hot/cold stage through the use of vacuum. A transparent inverted nitrogen shroud cap encloses the stage, chip and probe tips and the arms which carry the tips. Dry nitrogen gas is bled into the cap to purge air to avoid condensation as the temperature is lowered. Thereafter, the probe tips are lowered into contact with the exposed surface of the integrated circuit. These tips are used to provide the input and the output for each circuit. For further information regarding this apparatus, which requires complex controls and is designed for automated testing, reference may be made to U.S. Pat. No. 3,710,251.